ch2 硬件环境教学课件.ppt

1,张惠娟 副教授Ms.zhj163.com,实用操作系统概念,2,内容框架,概述 体系结构 进程管理 内存管理 文件管理 外设管理,3,内容,Ch2: 计算机体系结构 Ch3: 操作系统体系结构,4,Modern computer system structure 中断机制 CPU I/O Structure Storage Structure Hardware Protection General System Architecture,Ch2：体系结构,5,现代计算机体系结构,Modern computer system structure,6,I/O devices and the CPU can execute concurrently.Each device controller is in charge of a particular device type.Each device controller has a local buffer.CPU moves data from/to main memory to/from local buffersI/O is from the device to local buffer of controller.Device controller informs CPU that it has finished its operation by causing an interrupt.,Modern computer system structure,7,中断机制,An operating system is interrupt drivenInterrupts transfers control to the interrupt service routine generally, through the interrupt vector, which contains the addresses of all the service routines.Interrupt architecture must save the address of the interrupted instruction.Incoming interrupts are disabled while another interrupt is being processed to prevent a lost interrupt.,8,The operating system preserves the state of the CPU by storing registers and the program counter.Determines which type of interrupt has occurred: pollingvectored interrupt systemSeparate segments of code determine what action should be taken for each type of interrupt,中断机制,9,I/O Structure,Two I/O methods I/O technology,10,Two I/O methods,Synchronous,Asynchronous,11,Two I/O methods,Synchronous After I/O starts, control returns to user program only upon I/O completion.wait instruction idles the CPU until the next interruptwait loop (contention for memory access).At most one I/O request is outstanding at a time, no simultaneous I/O processing.,12,Asynchronous After I/O starts, control returns to user program without waiting for I/O completion.System call request to the operating system to allow user to wait for I/O completion.Device-status table contains entry for each I/O device indicating its type, address, and state.Operating system indexes into I/O device table to determine device status and to modify table entry to include interrupt.,Two I/O methods,13,I/O technology,Program I/O Interrupt DMA Channel,14,I/O technology,Program I/O 处理器提供I/O相关指令实现 处理器定期轮询I/O单元的状态，直到处 理完毕 Problem 占用cpu时间,15,I/O technology,Interrupt解决PIO技术中的问题，让处理器从轮询任务中解放出来，使I/O操作和指令执行并行起来。具体作法 当I/O处理单元准备好与设备交互的时候，通过物理信号通知处理器，即中断处理器。,16,I/O technology,DMA中断的引入大大地提高了处理器处理I/O的效率，但是效率仍旧不高。解决方法： 直接存储器（DMA）访问 通过系统总线中一独立控制单元DMA控制器， 自动控制成块数据在内存和I/O单元间的传送，大大提高处理I/O的效能。,17,程序I/O,中断I/O,DMA,18,Channel独立于中央处理器，专门负责数据I/O传输的处理机，又称为I/O处理机引入通道的目的使CPU从I/O事务中解脱出来同时为了提高CPU与设备、设备与设备之间的并行度,I/O technology,19,Main memory Secondary storage Storage Hierarchy Caching,Storage Structure,20,Storage Structure,Main memory only large storage media that the CPU can access directly. 两类存储器： 读写型存储器（RAM）、只读型存储器（ROM）,21,Secondary storageMagnetic disks rigid metal or glass platters covered with magnetic recording material Disk surface is logically divided into tracks, which are subdivided into sectors.The disk controller determines the logical interaction between the device and the computer.,Storage Structure,22,23,Storage Hierarchy,Storage systems organized in hierarchy.Speedcostvolatility,24,Storage-Device Hierarchy,25,26,Caching,Caching copying information into faster storage system; main memory can be viewed as a last cache for secondary storage.,27,Caching,缓冲三种位置处理器与主存储器之间处理器和其它外部设备之间设备与设备之间的通信 目的 解决部件之间速度不匹配的问题,28,Hardware Protection,Dual-Mode Operation I/O Protection Memory Protection CPU Protection,29,Hardware Protection,Dual-Mode OperationSharing system resources requires operating system to ensure that an incorrect program cannot cause other programs to execute incorrectly.,30,Hardware Protection,Provide hardware support to differentiate between at least two modes of operations.1.User mode execution done on behalf of a user.2.Monitor mode (also supervisor mode or system mode) execution done on behalf of operating system.,31,Hardware Protection,Mode bit added to computer hardware to indicate the current mode: monitor (0) or user (1).,monitor,user,Interrupt/fault,set user mode,32,Hardware Protection,Privileged instructions can be issued only in monitor mode. When an interrupt or fault occurs hardware switches to monitor mode.,33,Hardware Protection,I/O ProtectionAll I/O instructions are privileged instructions.Must ensure that a user program could never gain control of the computer in monitor mode (I.e., a user program that, as part of its execution, stores a new address in the interrupt vector).,34,Hardware Protection,Memory ProtectionMust provide memory protection at least for the interrupt vector and the interrupt service routines.In order to have memory protection, add two registers that determine the range of legal addresses a program may access:base register holds the smallest legal physical memory address.Limit register contains the size of the range Memory outside the defined range is protected.,35,36,Hardware Protection,CPU ProtectionTimer interrupts computer after specified period to ensure operating system maintains control.Timer is decremented every clock tick.When timer reaches the value 0, an interrupt occurs.Timer commonly used to implement time sharing.Time also used to compute the current time.Load-timer is a privileged instruction.,37,Use of A System Call to Perform I/O,38,小节,了解计算机体系结构 I/O方式 存储机制 保护机制,39,Exercises,阅读P19P41 P41,